Search for tag: "analog"

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AVLSI Demo 10 - Stability Probes duration 13 minutes 16 seconds AVLSI Demo 10 - Stability Probes AVLSI Demo 10 - Stability Probes	AVLSI Demo 10 - Stability Probes How to use stability probes to check stability, phase margin etc. stability cadence virtuoso avlsia analogue circuits analog circuits phase analysis amplifier plots margin plot gain probe points differential loop signal phi outputs thing frequency response things mode From Filip Taneski 0 likes 46 plays 0 Course Code ELEE11073 Publisher Filip Taneski Licence Type Creative Commons - Attribution Language English Date Created March 4th, 2021
AVLSI Demo 9 - Config Views duration 8 minutes 54 seconds AVLSI Demo 9 - Config Views AVLSI Demo 9 - Config Views	AVLSI Demo 9 - Config Views Introduction to config views, why they are useful and how to set them up. avlsib cadence virtuoso analogue circuits analog circuits model config test conflict bench tests dc stimulus default hierarchy cell testbench stability block things explorer update mark exclamation template From Filip Taneski 0 likes 58 plays 0 Course Code ELEE11073 Publisher Filip Taneski Licence Type Creative Commons - Attribution Language English Date Created March 4th, 2021
AVLSI Troubleshoot 4 - Single Monte Carlo DC… duration 2 minutes 1 second AVLSI Troubleshoot 4 - Single Monte Carlo DC… AVLSI Troubleshoot 4 - Single Monte Carlo DC Operating Point	AVLSI Troubleshoot 4 - Single Monte Carlo DC Operating Point How to annotate the DC operating point of a single Monte Carlo run in Cadence Virtuoso avlsib cadence virtuoso analogue circuits analog circuits point run corner dc carlo monte runs devices colourant lunch values settings copy points annotate colour simulations From Filip Taneski 0 likes 39 plays 0 Course Code ELEE11073 Publisher Filip Taneski Licence Type Creative Commons - Attribution Language English Date Created February 25th, 2021
AVLSI Troubleshoot 1 - Locked Cell Views duration 2 minutes 31 seconds AVLSI Troubleshoot 1 - Locked Cell Views AVLSI Troubleshoot 1 - Locked Cell Views	AVLSI Troubleshoot 1 - Locked Cell Views How to unlock cell views in Cadence Virtuoso by deleting lock files. avlsib analog analog circuits virtuoso cadence lock files problem locke sort middle ends star k. llc space command cdx cope model crew abc unix clicking cell From Filip Taneski 0 likes 68 plays 0 Course Code ELEE11073 Publisher Filip Taneski Licence Type Creative Commons - Attribution Date Created January 19th, 2021
Electronics & Electrical Engineering (EEE)… duration 20 minutes 34 seconds Electronics & Electrical Engineering (EEE)… Electronics & Electrical Engineering (EEE) virtual open day video	Electronics & Electrical Engineering (EEE) virtual open day video An introduction to Electronics and Electrical Engineering (EEE) related degrees from University of Edinburgh. Hear from our staff and students, and learn about what our EEE degrees are all about. electronics electrical engineering recruitment eee degree students edinburgh industry power things programs analog student tripoli microelectronics graduates microcontrollers opportunity skills balance opportunities teaching From Philip Hands 0 likes 323 plays 0 Publisher Philip Hands Licence Type All rights reserved The University of Edinburgh Language English Date Created October 13th, 2020